Computer Architecture — question 6 of 10
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Three masters on an on-chip bus — a CPU, a DMA engine, and a display controller — all want access to the same memory port, and the display controller has a hard real-time requirement (it must never stall or you get a visible glitch on screen). Describe an arbitration scheme that protects the display controller without starving the CPU or DMA, and explain what metric you'd measure on a logic analyzer or bus trace to prove your scheme actually works under load.