Digital Logic — question 9 of 10
Write a real answer. It is graded against the question's rubric, and the mastery movement is computed by the same engine the product uses. Scoring here is deterministic rather than model-written, so this page costs nothing to run and nothing is saved. In a track built from your own posting, the same rubric is graded by the model, which is what produces feedback about your reasoning rather than about coverage.
This tests whether a candidate understands metastability as a probabilistic, physically-grounded phenomenon (MTBF, resolution time) rather than a binary 'synchronizer present or absent' checkbox, and can connect environmental stress to that probability.
A design already uses a standard two-flip-flop synchronizer to bring a single-bit asynchronous status signal into a fast clock domain, and it has passed validation at room temperature for weeks. Once units ship and get tested in a thermal chamber at temperature extremes (both hot and cold), a small fraction of units occasionally latch the wrong value of that status signal, causing a downstream state machine to glitch. The synchronizer flip-flops themselves were never touched or modified. Walk through how you'd reason about what's changing with temperature, and what you would actually go measure to confirm your theory.