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Analog Electronics interview questions

Amplifiers, references, and the non-idealities that dominate real designs.

Practice all 10, gradedOne at a time. Free, no account.

What interviewers probe

  • Op-Amp Topologies
  • Op-Amp Non-Idealities
  • Noise Sources & Budgets
  • ADC Fundamentals
  • Voltage References & Biasing

Builds on Impedance, Frequency Response & Filters.

10 questions, easiest first

  1. 1You build an inverting amplifier using an op-amp with an input resistor Rin = 2kΩ and a feedback resistor Rf = 20kΩ, driven by a DC input of 50mV. Walk me through how you'd find the output voltage, and explain what role the 'virtual ground' assumption plays in getting there.intro
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    Because of negative feedback, the inverting input is held at the same potential as the non-inverting input, which is grounded here -- that's the virtual ground. Since no current flows into the op-amp's input pins, the current through Rin (Vin/Rin = 50mV/2k = 25uA) has to flow entirely through Rf. That current sets up a voltage drop across Rf, and because the inverting node is at 0V, Vout = -I*Rf = -25uA*20k = -500mV. So Vout = -(Rf/Rin)*Vin = -10*50mV = -500mV. This whole shortcut only works because we're assuming an ideal op-amp with infinite open-loop gain and zero bias current -- in a real part there'd be small deviations from this.

    • States correct gain formula — Answer explicitly writes or derives Vout = -(Rf/Rin)*Vin.
    • Explains virtual ground reasoning — Explains that negative feedback pins the inverting input to 0V (ground reference) so all input current must flow through Rf, without invoking current entering the op-amp.
    • Computes correct numeric value — Arrives at Vout = -500mV given the stated resistor and input values.
    • Notes the underlying ideal assumptions — Mentions this relies on infinite open-loop gain and zero input bias current, i.e. an idealization.

    Where answers go wrong: Dropping the negative sign in the gain expression. · Computing Rin/Rf instead of Rf/Rin. · Assuming current flows into the op-amp's inverting input pin.

  2. 2You need to measure a small differential signal, only a few millivolts, riding on top of a 5V common-mode voltage from a Wheatstone bridge sensor. A colleague suggests building a simple difference amplifier from a single op-amp and four resistors. What is your concern with that approach, and what would you propose instead? Explain what property of the alternative circuit actually solves the problem.intro
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    A single-op-amp difference amp relies on four resistors matching exactly to reject common-mode signal; with 5V common-mode and only a few mV of signal, even 0.1% resistor mismatch can inject an error comparable to the signal itself, and CMRR degrades further because each input sees a different, relatively low impedance that can load the bridge asymmetrically. I'd use an instrumentation amplifier instead - either a monolithic 3-op-amp in-amp or build one - because the two input buffers present very high, matched impedance to the bridge and don't participate in setting CMRR, so a single resistor sets gain while a separate, tightly-matched difference stage (often factory-trimmed) handles common-mode rejection. That decouples gain accuracy from CMRR and gives much higher rejection of the 5V common-mode swing.

    • Identifies CMRR degradation from resistor mismatch — States that the difference amp's CMRR is limited by resistor matching tolerance, so a 5V common-mode signal can leak through as error comparable to or larger than the few-mV signal of interest.
    • Notes low/unbalanced input impedance — Mentions that the resistive difference amp presents unequal, relatively low impedance to the two bridge outputs, which can load the sensor asymmetrically.
    • Proposes an instrumentation amplifier — Recommends a 3-op-amp instrumentation amplifier (or monolithic in-amp) as the alternative.
    • Explains the mechanism that fixes the problem — Explains that buffering each input with a high-impedance non-inverting stage before the difference stage lets a single resistor set gain without degrading CMRR, and keeps input impedance high and balanced.

    Where answers go wrong: Treating this as purely a gain-accuracy problem instead of a common-mode rejection problem. · Not mentioning that resistor tolerance, not amplifier open-loop gain, is what limits CMRR here. · Forgetting that the bridge itself gets loaded differently by the two resistor legs.

  3. 3You build an inverting amplifier with a gain of 100 to boost a small sensor signal. With the input grounded (zero signal applied), you still measure several hundred millivolts at the output instead of 0V. What's likely causing this, and how would you confirm it on the bench?easy
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    Real op-amps aren't perfectly matched internally, so they have an input offset voltage, typically microvolts to a few millivolts, that behaves as if a small DC source were sitting at the input. In this circuit that offset gets multiplied by the noise gain, 1+Rf/Rin, which for a gain-of-100 inverting stage is roughly 101. Even 2-3mV of Vos becomes 200-300mV at the output, which matches what's being seen. Input bias current flowing through the feedback and source resistances adds a smaller additional term. To confirm, I'd check the datasheet's Vos spec against the measured value, try swapping in a different unit of the same part number to see if it tracks part-to-part variation, and change Rf while holding the gain constant to see if the offset scales as bias-current-times-resistance would predict versus staying fixed as Vos would.

    • Identifies input offset voltage as primary suspect — Names input offset voltage (Vos) being amplified as the likely dominant cause of the DC output with grounded input.
    • Identifies bias current contribution — Mentions input bias currents flowing through Rf/Rin (or source resistance) as an additional or secondary contributor to the offset.
    • Proposes a concrete bench test — Suggests a specific way to isolate the cause, e.g. checking the datasheet Vos spec, varying feedback resistor value, swapping the op-amp, or running a temperature sweep.
    • Notes offset scales with noise gain — Explains that the output offset equals Vos times (1+Rf/Rin), not the signal gain in general, so a high-gain stage amplifies even a few mV of Vos into hundreds of mV.

    Where answers go wrong: Assuming the sensor or wiring must be picking up noise rather than considering the amplifier itself. · Confusing signal gain with noise gain when estimating expected offset. · Not proposing any way to distinguish offset voltage from bias-current-induced offset.

  4. 4Your data acquisition board uses a 2.5V voltage reference with a temperature coefficient of 50ppm/°C to set a 12-bit ADC's full-scale range. Over a 40°C temperature swing, estimate the resulting error in the reference voltage, and say whether it matters for the measurement.easy
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    50ppm/°C times a 40°C swing is 2000ppm, or 0.2% of 2.5V, which works out to about 5mV of reference drift. A 12-bit ADC over a 2.5V range has an LSB of 2.5V/4096, about 0.61mV. So 5mV of drift is roughly 8 LSBs -- much bigger than the quantization noise floor, so it absolutely matters; it would show up as a slowly varying full-scale error across temperature. To deal with it you could pick a lower-drift reference, calibrate/compensate against a temperature sensor, or use a ratiometric setup where the same reference drives both the sensor excitation and the ADC so the drift cancels in the ratio.

    • Computes drift correctly — Calculates drift ≈ 50ppm/°C * 40°C * 2.5V ≈ 5mV.
    • Computes 12-bit LSB size — Computes 2.5V/4096 ≈ 0.61mV as the quantization step for comparison.
    • Concludes drift dominates — States that 5mV of drift is roughly 8 LSBs, far larger than one quantization step, so it matters and would need calibration or a better reference.
    • Notes practical mitigation — Mentions a mitigation such as ratiometric measurement, temperature compensation/calibration, or choosing a lower-drift reference.

    Where answers go wrong: Treating ppm as a percentage instead of parts-per-million. · Comparing the drift to the wrong LSB size (e.g. using 10-bit or 8-bit resolution). · Assuming quantization error, not reference drift, is the dominant error source without checking the numbers.

  5. 5You measure an unexpected DC offset at the output of an inverting op-amp amplifier with the input grounded. You suspect the culprit is either the op-amp's input offset voltage or its input bias current, but you don't have a datasheet handy. Using only measurements and changes to your resistor values, how would you figure out which one is dominant?easy
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    I'd write the two error terms separately: the offset-voltage contribution is Vos times the noise gain (1+Rf/Rin), which only depends on the resistor ratio, while the bias-current contribution is roughly Ib times Rf, which depends on the absolute resistance value. So I'd pick a new resistor pair that keeps the same ratio - same gain - but scales both Rf and Rin down by, say, 10x, and re-measure the grounded-input output offset. If the offset barely changes, Vos is dominant since the ratio didn't change. If the offset shrinks by roughly the same 10x factor, bias current dominates because Rf shrank. This lets me separate the two without ever opening a datasheet.

    • States the Vos error equation — Gives Vos-induced output offset as Vos*(1+Rf/Rin) and notes it depends only on the resistor ratio.
    • States the bias current error equation — Gives bias-current-induced output offset as approximately Ib*Rf and notes it depends on the absolute resistor magnitude.
    • Proposes a controlled resistor-scaling test — Suggests scaling Rf and Rin down together (keeping their ratio/gain fixed) and re-measuring the output offset.
    • Correctly interprets the result — States that if the offset stays the same the error is dominated by Vos, and if it shrinks proportionally the error is dominated by bias current.

    Where answers go wrong: Assuming that simply changing the gain identifies the cause, without realizing both mechanisms scale with gain in different ways. · Forgetting that bias-current-induced offset depends on absolute resistor value, not just the Rf/Rin ratio. · Proposing to swap the op-amp for a different part instead of using a measurement-based test. · Ignoring input offset current (the mismatch between the two bias currents) as a related but distinct contributor.

  6. 6You're budgeting noise for a signal chain: a 10kΩ source resistance feeding an op-amp with an input voltage noise density of 15nV/√Hz, over a 100kHz noise bandwidth. Walk through estimating the total input-referred RMS noise, and say whether it would meet a 10µV rms noise floor requirement.medium
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    A 10kΩ resistor has thermal noise density of about sqrt(4kTR), which at room temperature works out to roughly 12.8nV/√Hz. That combines with the op-amp's 15nV/√Hz input voltage noise in root-sum-square, since they're independent: sqrt(12.8^2+15^2) is about 19.7nV/√Hz. Over a 100kHz noise bandwidth, the RMS noise is that density times sqrt(100,000), which is about 19.7nV * 316 ≈ 6.2µV rms. That's below the 10µV requirement, so on paper it passes with roughly 40% margin. But I'd flag that this ignores bias-current noise flowing through the source resistance, any 1/f corner in the op-amp's noise spectrum at low frequencies, and noise from the gain-setting resistors, all of which could eat into that margin, so I'd want to measure the actual noise floor on the bench before calling it closed.

    • Computes resistor thermal noise density — Uses 4kTR to get roughly 12-13nV/√Hz for a 10kΩ resistor at room temperature.
    • Combines sources via RSS — Combines the resistor noise density and the 15nV/√Hz op-amp noise density using root-sum-square rather than adding directly.
    • Integrates over bandwidth correctly — Multiplies the combined density by the square root of 100kHz to arrive at roughly 6µV rms total input-referred noise.
    • Compares against the spec and flags caveats — States the ~6µV result meets the 10µV requirement with some margin, and notes other terms (bias current noise, 1/f corner, gain resistor noise) could erode that margin.

    Where answers go wrong: Adding the two noise densities linearly instead of in RSS. · Forgetting to multiply by sqrt(bandwidth) and instead multiplying by the bandwidth directly. · Ignoring that other noise sources (bias current noise into source impedance, 1/f noise at low frequency) can add to the total in a real design.

  7. 7You sample a sensor signal at fs = 1kHz, expecting a clean 10Hz waveform, but your captured data shows a slowly drifting sinusoid near 100Hz that shouldn't physically exist in the sensor. You suspect aliasing from an unfiltered interferer. What is the lowest frequency, above your signal band, that could fold down and appear as a 100Hz alias, and how would you fix the front end?medium
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    With fs = 1kHz, the Nyquist frequency is 500Hz -- anything sampled above that folds back into the 0-500Hz band as an alias. A component at 900Hz would fold to |1000-900| = 100Hz, which matches what's being seen, so 900Hz is the lowest frequency above the signal band that produces this specific alias. But it's not unique -- 1100Hz, 1900Hz, and other frequencies spaced around multiples of fs also fold to 100Hz. Since aliasing happens at the moment of sampling, no amount of digital filtering afterward can remove it -- the fix has to be an analog anti-aliasing low-pass filter placed before the ADC, with a cutoff well below the 500Hz Nyquist limit and enough rolloff to attenuate anything near or above 900Hz, or alternatively increasing the sample rate so the interferer no longer folds into the band of interest.

    • States Nyquist frequency and folding mechanism — Correctly identifies the Nyquist frequency as 500Hz and explains that content above it folds back into the sampled band.
    • Computes the alias source frequency — Computes that a 900Hz interferer (fs - 100Hz) would alias down to appear as 100Hz.
    • Recognizes multiple aliasing frequencies — Notes that other frequencies (e.g. 1100Hz, 1900Hz, and so on) also alias to 100Hz, not just the single lowest one.
    • Proposes correct fix — Proposes an analog anti-aliasing low-pass filter before the ADC set well below Nyquist, or increasing the sample rate, and explicitly notes a digital filter after sampling cannot remove aliasing that already occurred.

    Where answers go wrong: Confusing the sample rate with the Nyquist frequency. · Assuming only one frequency can alias down to 100Hz. · Suggesting a digital low-pass filter applied after sampling would fix the aliasing.

  8. 8Your application needs to resolve a 200µV step riding on a 2V full-scale ADC input range. The 16-bit ADC you're considering has a datasheet SINAD of 89dB at your sampling rate. Calculate the ADC's effective number of bits (ENOB), then use that to decide whether this converter can actually resolve your 200µV step, or whether you need a part with a higher SINAD.medium

    ENOB = (SINAD - 1.76) / 6.02. Effective (noise-limited) resolution ≈ Full-scale / 2^ENOB.

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    ENOB = (89 - 1.76)/6.02 ≈ 14.5 bits, well short of the nominal 16 bits. Effective resolution is full-scale divided by 2^ENOB, so 2V / 2^14.5 ≈ 2V/23,170 ≈ 86µV per effective LSB. My requirement is a 200µV step, which is roughly 2.3x the effective LSB, so the part can resolve it, but the margin is thinner than the 16-bit nominal spec would suggest - I wouldn't want the requirement to shrink much further without either averaging samples to reduce noise bandwidth or picking a higher-SINAD part.

    • Computes ENOB correctly — Calculates ENOB = (89-1.76)/6.02 ≈ 14.5 bits.
    • Computes effective resolution — Converts ENOB to an effective LSB size using full-scale/2^ENOB, arriving at roughly 80-90µV.
    • Makes a correct go/no-go call with margin reasoning — Compares the ~85µV effective resolution to the 200µV requirement and concludes the part has roughly 2x margin, so it's adequate (while noting margin is thinner than the nominal 16 bits would suggest).

    Where answers go wrong: Using the nominal 16-bit resolution (2V/65536 ≈ 30µV) instead of the SINAD-derived ENOB resolution. · Forgetting that 1.76 constant in the ENOB formula. · Concluding the part is inadequate without actually computing the effective LSB, based only on the 'lost bits' feeling.

  9. 9You configure an op-amp for a non-inverting gain of 10. Its datasheet lists a gain-bandwidth product of 1MHz and a slew rate of 0.2V/µs. You drive it with a 20kHz sine wave targeting 5Vpp output, but on the scope the output looks like a triangle wave instead of a sine. Is this a bandwidth limitation or a slew-rate limitation, and how do you tell the two apart from the waveform shape alone?hard
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    First I'd rule out small-signal bandwidth: closed-loop bandwidth is GBW divided by the noise gain, so 1MHz/10 = 100kHz, which is five times higher than the 20kHz signal, so the amplifier has plenty of small-signal bandwidth here -- that's not the bottleneck. Next I'd check slew rate: a sine wave's maximum slope is 2*pi*f*Vpeak, and with Vpeak = 2.5V at 20kHz that's about 2*pi*20,000*2.5 ≈ 0.314V/µs, but the op-amp is only rated for 0.2V/µs. It literally can't ramp fast enough through the steepest part of the sine, so the output saturates its output stage's maximum rate and rides a straight line until it catches back up with the input -- that's exactly what produces the triangle-wave look. If it had instead been a bandwidth problem, I'd expect the output to still look sinusoidal, just smaller in amplitude and phase-shifted, not turned into straight-line ramps. To fix it I'd either drop the output amplitude, lower the signal frequency, reduce the gain to shrink the required output swing, or swap in a faster op-amp with higher slew rate.

    • Computes closed-loop bandwidth — Calculates closed-loop bandwidth as GBW/gain = 1MHz/10 = 100kHz, and notes 20kHz is well within it.
    • Computes required slew rate — Calculates the sine wave's required slew rate as 2*pi*f*Vpeak ≈ 2*pi*20kHz*2.5V ≈ 0.314V/µs and compares it to the available 0.2V/µs, showing the op-amp can't keep up.
    • Explains the distinguishing waveform signature — Explains that slew-rate limiting produces a constant-slope, triangle-like output because the op-amp output ramps at its maximum rate through the steep parts of the sine, whereas bandwidth limiting would instead reduce amplitude and shift phase while keeping a sinusoidal shape.
    • Proposes a fix — Suggests reducing output amplitude, reducing frequency, reducing gain, or selecting a faster op-amp with higher slew rate.

    Where answers go wrong: Assuming any waveform distortion at high frequency must be a bandwidth issue without checking the numbers. · Not computing the required slew rate for the actual signal amplitude before concluding. · Believing that increasing supply voltage or adding compensation would fix a slew-rate limitation.

  10. 10You've built a precision analog front end: a voltage reference sets an ADC's full-scale range, and a precision op-amp buffers and amplifies a sensor signal ahead of it. At room temperature everything reads correctly, but running the board through a thermal chamber from -20C to +85C, the measured output drifts by several millivolts referred to input, and the drift isn't monotonic with temperature. Walk through how you'd isolate whether the dominant error source is the reference's temperature coefficient, the op-amp's offset voltage drift, or its bias current drift.hard
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    First I'd null the input by shorting or grounding it and sweep temperature - this removes the reference's gain-scaling contribution from the picture and leaves only offset voltage drift and bias-current drift acting on whatever resistance is at the input. In parallel, I'd measure the reference output directly with a precision meter across the same temperature sweep to characterize its tempco completely independent of the amplifier stage. Then, to split offset voltage from bias current within the nulled measurement, I'd change the feedback/source resistance and repeat the sweep - a bias-current-driven error should scale with that resistance change while a Vos-driven error won't. If after all this the drift is still non-monotonic, that points to either two competing mechanisms with different temperature curves partially canceling in different ranges, or something like reference hysteresis or thermal gradients across the board rather than a single simple tempco curve, so I'd also check for self-heating and airflow effects in the chamber.

    • Nulls the signal input to isolate offset/bias drift — Proposes shorting or grounding the amplifier's input and sweeping temperature to observe drift with the reference's gain-scaling effect removed.
    • Measures the reference independently — Proposes measuring the reference output directly with a precision meter across temperature to characterize its tempco in isolation from the rest of the signal chain.
    • Distinguishes Vos drift from Ib drift via resistance change — Suggests changing source resistance or feedback resistor value and repeating the temperature sweep, since Ib-driven drift scales with resistance while Vos-driven drift does not.
    • Addresses the non-monotonic behavior — Notes that non-monotonic drift suggests either multiple competing error mechanisms with different signs/temperature curves, reference hysteresis, or thermal gradients across the board rather than a single simple linear tempco.

    Where answers go wrong: Assuming the reference is automatically the culprit without measuring it independently. · Not nulling the signal input, so reference gain error and op-amp offset drift stay tangled together in the same measurement. · Overlooking that bias-current drift is diagnosable by changing resistor values, and instead trying to distinguish it purely by datasheet lookup. · Treating non-monotonic drift as noise or a fluke instead of a clue that more than one mechanism is competing.

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