Circuit Fundamentals interview questions

10 questions, easiest first

1. 1You're wiring a simple LED indicator: a 5V supply, an LED with a 2V forward drop, and a series current-limiting resistor. If you use a 220-ohm resistor, calculate the current through the LED and state whether it falls in the typical 15-20mA safe range for a standard indicator LED.intro

   This is the kind of first calculation almost every hardware intern is asked to do on day one before touching a real board.

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   First I apply KVL around the loop: the 5V supply is split between the LED's forward drop and the resistor, so the resistor sees 5V - 2V = 3V. Then Ohm's law gives the current: I = 3V / 220ohm ≈ 13.6mA. That's just under the typical 15-20mA range for a standard indicator LED, so it's safe from a current standpoint but the LED will run slightly dimmer than its rated brightness. If I wanted closer to 15mA I'd drop the resistor toward 200 ohms.

   • Subtracts LED drop before applying Ohm's law — Answer computes voltage across resistor as 5V - 2V = 3V, not 5V directly across the resistor.
   • Correct current calculation — Computes I = 3V / 220ohm ≈ 13.6mA.
   • Judges safety of the value — States whether 13.6mA is within or close to the stated 15-20mA safe range and what that implies (slightly under, likely dim but safe, or fine).

   Where answers go wrong: Dividing the full 5V by 220 ohms and ignoring the LED's forward drop. · Reporting the answer in amps instead of milliamps without noticing the order of magnitude is wrong. · Not commenting on whether the resulting current is actually safe/appropriate.

2. 2You have two resistors in parallel across a 9V rail feeding a small module: R1 = 1kOhm and R2 = 2kOhm. You expect the rail to source about 13.5mA total. Instead your ammeter reads 4.5mA. What's the most likely explanation, and how would you confirm it using only a multimeter, without desoldering anything?intro

   Basic bench debugging with an ammeter and multimeter, no schematic errors assumed -- just a fault in an otherwise-correct parallel network.

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   First I'd compute expected branch currents assuming both resistors are healthy: 9V/1k = 9mA through R1, 9V/2k = 4.5mA through R2, for 13.5mA total. The measured 4.5mA matches R2's branch current exactly, which is a strong hint that R1's branch is carrying zero current -- probably an open connection, a cold solder joint, or a lifted trace, not a resistance value change. To confirm without desoldering, I'd power the circuit and probe the voltage right at R1's two terminals relative to ground. If R1 is open somewhere past it, I'd expect to see the full rail voltage on one side and 0V (or a floating reading) on the far side, with essentially no drop across R1 itself since no current flows through it. I'd also sanity-check my ammeter setup -- wrong range or a bad connection there could mimic this symptom -- before concluding it's a board fault.

   • Computes expected branch currents — States or derives that R1 alone would draw 9mA and R2 alone 4.5mA from 9V, giving 13.5mA total if both are healthy.
   • Identifies the open branch — Recognizes that measured 4.5mA matches R2's branch current exactly, meaning R1's branch is carrying no current (open, not shorted or partially failed).
   • Proposes a non-invasive verification method — Suggests measuring voltage across R1 or at intermediate nodes with the circuit still powered to locate the open connection without desoldering.
   • Considers measurement error as a secondary check — Mentions verifying the ammeter itself (range, burden voltage, loose probe) before concluding it's a circuit fault.

   Where answers go wrong: Treating the parallel combination as if it behaves like a single equivalent resistor whose value simply changed, without isolating which branch failed · Recomputing using series-circuit formulas instead of independent parallel branches · Jumping straight to desoldering components instead of using in-circuit voltage measurements · Not noticing that the measured current exactly matches one branch's expected value

3. 3At a circuit node, two ideal current sources inject current into the node: one sourcing 5mA and one sourcing 3mA. From that same node, two resistors run to ground: 2kohm and 4kohm. Using KCL, calculate the steady-state voltage at the node.easy

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   KCL says the total injected current must equal the current leaving through the two resistors to ground. Total injected current is 5mA + 3mA = 8mA. The two resistors are both connected from the node to ground, so from the node's point of view they act in parallel: total conductance is 1/2k + 1/4k = 0.5mA/V + 0.25mA/V = 0.75mA/V. Setting current in equal to V times conductance: V = 8mA / 0.75mA/V ≈ 10.67V.

   • Sums the injected currents correctly — Recognizes total current entering the node is 5mA + 3mA = 8mA.
   • Sets up KCL equation with both resistor paths — Writes V/2k + V/4k = 8mA (or equivalent) rather than treating the resistors as in series.
   • Solves for correct node voltage — Solves to get V ≈ 10.67V, showing the algebra (combined conductance 0.75mA/V).

   Where answers go wrong: Adding the two resistors in series (6kohm) instead of recognizing they're both tied from the same node to ground, i.e. in parallel from the node's perspective. · Forgetting to sum both current sources before solving. · Mixing up mA and A leading to an answer off by 1000x.

4. 4You built a simple voltage divider from two 100kohm resistors across a 10V supply to get a 5V midpoint. Measuring it with a multimeter, you read 5V exactly as expected. But when you connect that same midpoint to a microcontroller's ADC input pin, the reading drops to about 3.3V. Walk through why this happens and what you'd check to confirm your explanation.easy

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   The divider's Thevenin equivalent, looking into the midpoint, is an ideal 5V source in series with about 50kohm (the two 100k resistors in parallel). A multimeter typically has ~10Mohm input impedance, which is so much larger than 50kohm that it barely loads the node, so it reads close to the true 5V. The microcontroller's ADC pin, though, has a much lower or comparable effective input impedance -- maybe from input leakage current, an internal sampling capacitor, or protection diodes -- so it draws enough current to form a real voltage divider with that 50kohm source resistance, pulling the reading down to 3.3V. To confirm, I'd either estimate the ADC's effective input resistance from the datasheet and predict the expected drop, or empirically lower the divider's resistor values (e.g. to 10k/10k) and see if the discrepancy shrinks, which would confirm loading rather than a broken ADC.

   • Computes/identifies the divider's Thevenin resistance — States that looking back into the midpoint, the source looks like ~50kohm (two 100k in parallel) in series with an ideal 5V source.
   • Explains why the multimeter didn't show the problem — Notes that a multimeter's input impedance (typically ~10Mohm) is high enough relative to 50kohm that it barely loads the divider, whereas the ADC pin's effective input impedance is much lower or comparable.
   • Describes how to confirm the diagnosis — Proposes a concrete check: e.g. measure current draw into the ADC pin, compute expected voltage from divider formula with an estimated ADC input impedance, or swap in known lower resistor values and see if the drop shrinks.

   Where answers go wrong: Assuming the microcontroller or ADC itself is broken rather than considering loading. · Not connecting the multimeter's high input impedance to why it didn't reveal the same effect. · Proposing to 'just use a lower voltage divider' without first confirming loading is actually the cause.

5. 5You're combining two logic-level signals into a single bias voltage for a comparator input using a passive resistor summing network (no op-amp). Rail A sits at 10V through a 2kOhm resistor, Rail B sits at 4V through a 2kOhm resistor, and both tie together at a common node that also has a 4kOhm resistor to ground. Using node analysis, what voltage appears at that common node?easy

   A simple three-branch resistive summing node -- the kind of circuit you'd sketch on a whiteboard to check before building it.

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   I'd set up KCL at the shared node: (Vn-10)/2k + (Vn-4)/2k + Vn/4k = 0. Multiplying through by 4k gives 2(Vn-10) + 2(Vn-4) + Vn = 0, which simplifies to 5Vn = 28, so Vn = 5.6V. That makes sense as a sanity check -- it sits between the two rail voltages, pulled somewhat toward the lower one because the pulldown resistor is effectively acting like a third 'rail' at 0V competing for influence over the node. If I removed the pulldown, the node would just settle wherever the two 2k resistors from A and B put it, roughly the average of 10V and 4V, i.e. 7V, since they're equal in size.

   • Writes a correct KCL equation — Sums (Vn-10)/2k + (Vn-4)/2k + Vn/4k = 0 or an equivalent correct nodal equation.
   • Solves for the correct node voltage — Arrives at Vn = 5.6V (or within the stated tolerance) through correct algebra.
   • Explains why the result falls between 4V and 10V — Notes the node voltage is a weighted blend of the two rails pulled toward ground by the third resistor, and reasons about which rail dominates.
   • Notes the loading interaction between the two rails — Recognizes this passive network doesn't isolate Rail A and Rail B from each other -- each rail's own source impedance affects the result if it isn't already lumped into the 2k values.

   Where answers go wrong: Averaging 10V and 4V directly and ignoring the pulldown resistor entirely · Omitting the ground branch's current term from the KCL sum · Mixing up the sign convention so some terms are added when they should be subtracted · Treating the network as a simple two-resistor divider instead of a three-branch node

6. 6You add a simple RC low-pass filter -- a 10kohm resistor and 100nF capacitor -- to debounce a mechanical push button feeding a digital input pin. After adding it, single presses register reliably, but fast double-clicks are sometimes missed entirely. Calculate the RC time constant, explain why the double-clicks are being lost, and describe the tradeoff you're now facing in choosing R and C.medium

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   tau = R*C = 10kohm * 100nF = 1ms. It typically takes about 3-5 time constants for the RC voltage to settle enough to reliably cross a digital logic threshold, so this filter needs roughly 3-5ms after each edge before the input can be trusted again. If a real double-click happens faster than that -- say within 2-3ms -- the capacitor hasn't finished responding to the first edge before the second one arrives, so the two presses blur into what looks like one transition, or the second edge doesn't cross the threshold cleanly and gets missed. The tradeoff is fundamental: a bigger R*C rejects mechanical bounce (which can itself last several ms) more robustly, but it also raises the minimum time between distinguishable button events; a smaller R*C is more responsive to fast real presses but risks letting bounce noise through. There's no single R*C that's optimal for both without more information (like actual bounce duration and the fastest legitimate double-click you need to support), which usually pushes you toward a software debounce or a hybrid approach.

   • Correct time constant — Computes tau = 10kohm * 100nF = 1ms.
   • Explains the missed double-click mechanism — Connects the ~1ms tau to a settling time of roughly 3-5ms needed to reliably cross the logic threshold, and explains that if the second press's edge arrives before the capacitor has fully discharged/recharged from the first, the transitions blur together or don't cross the threshold cleanly.
   • States the underlying tradeoff — Articulates that increasing R*C improves bounce rejection but increases the minimum time between distinguishable presses, and decreasing it does the opposite, with no value that satisfies both perfectly for very fast double-clicks.

   Where answers go wrong: Treating the RC filter as an instantaneous ideal debounce with no settling time. · Forgetting the roughly 5x factor between tau and full settling to a logic threshold. · Not identifying that this is an inherent tradeoff rather than a bug to be eliminated entirely.

7. 7You designed a single-pole RC low-pass filter and expected a roll-off of -20dB/decade past its corner frequency. When you sweep a sine wave through it and measure the response, you instead see -40dB/decade roll-off, and the corner frequency is noticeably lower than your calculated value. What does this tell you about the actual circuit, and what would you check first?medium

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   A single RC low-pass filter contributes one pole, giving -20dB/decade past its corner and 90 degrees of phase shift total. Seeing -40dB/decade tells me there are actually two poles in the path I'm measuring, not one -- something is adding a second pole I didn't account for in my calculation. The most likely culprits are in the measurement setup itself: the oscilloscope probe's input capacitance (often 10-15pF) combining with my source's output impedance to form a second RC pole, or a following load/next stage with its own resistance and capacitance loading the output node. It could also be parasitic capacitance from a long PCB trace. To check, I'd first try removing or changing the load (e.g. swap a 1x probe for 10x, or disconnect the next stage) and re-measure; if the slope goes back to -20dB/decade and the corner frequency matches my calculation, that confirms the extra pole was coming from the loading rather than the intended circuit. I could also check the phase shift at the corner frequency -- one pole gives about 45 degrees there and approaches 90 degrees total, while two poles would show close to 90 degrees at the corner and approach 180 degrees total.

   • Correctly interprets the slope — States that -40dB/decade implies two poles are acting in the measured path, not one, rather than just calling the filter 'wrong'.
   • Identifies plausible sources of the extra pole — Proposes at least one concrete real-world cause: scope/probe input capacitance loading the output, an unaccounted load resistor/capacitor at the next stage, or PCB trace/parasitic capacitance combining with the driving impedance.
   • Proposes a way to check — Suggests a concrete verification step, e.g. removing/changing the probe or load and re-measuring, or checking the phase shift at the corner (90 degrees per pole) to count poles independently of slope.

   Where answers go wrong: Concluding the resistor or capacitor values must simply be wrong without considering an unaccounted second pole. · Not connecting the doubled slope to a doubled pole count. · Ignoring the measurement setup itself (probe capacitance) as a possible contributor.

8. 8A sensor's output can be modeled as a Thevenin source: a 2V ideal source in series with 5kOhm of output impedance. You need to drive two different downstream circuits from that same output pin: an ADC input with 50kOhm input impedance, and an indicator-driver circuit with 1kOhm input impedance. Walk through what actually shows up at each load, what happens if both are connected to the pin at the same time, and what design decision you'd make.medium

   A common situation when a single sensor output needs to feed more than one downstream stage.

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   Each load forms a voltage divider with the sensor's 5kOhm source impedance. For the ADC at 50kOhm, the divider ratio is 50k/55k, about 91%, so it sees roughly 1.82V -- a fairly small, tolerable error. For the 1kOhm indicator load, the ratio is 1k/6k, about 17%, so it only sees about 0.33V -- that's a huge loss and probably unusable. If both loads are connected to the same pin simultaneously, they appear in parallel to the source, so the effective load drops to roughly 1k || 50k, which is close to 980 ohms -- barely better than the 1kOhm case alone, meaning both loads now see a badly attenuated signal. The real fix isn't to retune resistor values on a case-by-case basis; it's to insert a unity-gain buffer (op-amp voltage follower) right after the sensor so its effective output impedance becomes very low, letting it drive both loads independently without significant loss. If a buffer isn't available, I'd at minimum make sure any low-impedance load is driven from its own dedicated, appropriately-buffered output rather than sharing the raw sensor pin.

   • Computes/reasons the ADC-load attenuation — States the ADC load forms a divider of roughly 50k/(50k+5k), giving about 90% of 2V (~1.8V).
   • Computes/reasons the LED-driver-load attenuation — States the 1kOhm load forms a divider of roughly 1k/(1k+5k), giving about 17% of 2V (~0.33V), a severe loss.
   • Analyzes the simultaneous-load case — Recognizes that connecting both loads at once puts them in parallel from the source's point of view, dropping the effective load impedance below 1kOhm and worsening attenuation further.
   • Proposes a concrete fix — Suggests a buffer amplifier (op-amp voltage follower), reducing the sensor's effective source impedance, or physically separating the outputs rather than tying both loads to the same pin.
   • States the general loading principle — Notes that load impedance should be much larger than source impedance for negligible loading error, and connects that principle back to this specific case.

   Where answers go wrong: Assuming the output stays at 2V regardless of what's connected to it · Analyzing each load in isolation and never computing the parallel combination for the simultaneous case · Fixing the problem by just raising the source voltage instead of addressing the impedance mismatch · Forgetting that Thevenin resistance interacts with load resistance as a voltage divider, not a current divider

9. 9You're probing a high-impedance sensor output using a standard oscilloscope probe. The sensor's Thevenin equivalent is an ideal source in series with 100kohm of source resistance. The probe is modeled as 1Mohm in parallel with 10pF. Derive the effective -3dB corner frequency of this measurement path caused by the interaction between the source resistance and the probe's capacitance, and describe what you'd actually see on screen for a fast edge from the sensor.hard

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   Treating the sensor as an ideal Thevenin source with 100kohm in series, and the probe as 1Mohm parallel with 10pF, the capacitor's node sees an effective resistance equal to the source and probe resistances in parallel, since for AC analysis the ideal source acts as a ground reference: R_eff = (100k*1M)/(100k+1M) ≈ 90.9kohm. The corner frequency is then f = 1/(2*pi*R_eff*C) = 1/(2*pi*90,909*10e-12) ≈ 175kHz. On top of that, there's a small DC attenuation from the 100k/1M resistive divider itself, about a 9% drop even for slow signals. Practically, this means any edge or frequency content above roughly 175kHz gets rolled off: a fast edge from the sensor will show up on screen noticeably rounded, with a rise time on the order of the RC time constant (roughly 350ns for the full 10-90% transition), rather than the sensor's true fast edge. This is exactly why probing high-impedance sources with a 1x probe is discouraged -- switching to a 10x probe with much higher resistance and lower capacitance would push this corner frequency up substantially and reduce the distortion.

   • Computes the correct effective resistance — Recognizes the capacitor's node sees the source resistance (100k) in parallel with the probe resistance (1M), giving roughly 90.9kohm, not just 100k or just 1M alone.
   • Derives the correct corner frequency — Applies f = 1/(2*pi*R_eff*C) with R_eff ≈ 90.9kohm and C = 10pF to get roughly 175kHz.
   • Describes the resulting waveform distortion — Explains that a fast edge will appear rounded/slowed on screen (rise/fall time roughly proportional to the RC time constant) and mentions the small resistive attenuation from the 100k/1M divider even at DC.

   Where answers go wrong: Using only the source resistance or only the probe resistance in the corner frequency formula instead of their parallel combination. · Forgetting that there's also a small DC attenuation from the resistive divider, separate from the frequency roll-off. · Not connecting the corner frequency back to a physical rise-time distortion on the scope.

10. 10A relay coil is modeled as 100mH of inductance in series with 10 ohms of resistance, carrying 500mA, driven through a MOSFET switch with no flyback diode across the coil. When the MOSFET abruptly turns off, the textbook formula V = L(di/dt) suggests the voltage spike across the switch node could be enormous, even unbounded. Explain what's physically wrong with taking that formula at face value here, what actually limits the real voltage spike in hardware, and what you'd add to the circuit to fix it.hard

    Classic inductive-kickback scenario when switching an inductive load without protection.

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    The naive V=L(di/dt) formula assumes we can specify dt, but an ideal switch opening 'abruptly' tries to force di/dt toward infinity, which the formula turns into an infinite voltage -- that's a sign the model is incomplete, not a real prediction. In an actual circuit, the switch node always has some parasitic capacitance, from the MOSFET's output capacitance and stray wiring, and that capacitance forms an LC tank with the 100mH coil. Instead of an instantaneous infinite spike, you get a large but finite, fast ringing voltage as the coil's stored energy sloshes into that capacitance. The peak of that ring can easily exceed the MOSFET's breakdown voltage, which either triggers avalanche breakdown in the device repeatedly until it degrades, or causes arcing/damage at a mechanical contact if this were a relay contact instead. The standard fix is a flyback diode wired across the coil, oriented so it's reverse-biased in normal operation but forward-biases the instant the switch opens, giving the coil current a low-voltage path to freewheel through and decay via the coil's own resistance instead of ringing dangerously high. In faster or higher-current designs you might use a snubber or TVS clamp instead, trading off recovery time and dissipation for better switching speed than a diode allows.

    • Explains the flaw in the naive formula — States that V=L(di/dt) with dt approaching zero implies infinite voltage, and that this signals a missing element in the model rather than a physically real infinite voltage.
    • Identifies parasitic capacitance as the real limiter — Names parasitic/stray capacitance at the switch node (device Coss, wiring capacitance) as forming an LC network with the inductor that produces a large but finite ringing voltage.
    • Describes the real-world consequence — States that the resulting voltage can exceed the switch's breakdown rating, leading to avalanche breakdown, arcing, or device damage.
    • Proposes a correct fix — Proposes a flyback diode across the coil (or a snubber/TVS clamp) to give the current a path and limit the voltage.
    • Connects to impedance rising with frequency — Notes that the inductor's impedance (jwL) grows with the fast frequency content of an abrupt switching edge, which is part of why the transient is so energetic.

    Where answers go wrong: Plugging in an assumed finite dt to get a finite number without acknowledging that dt isn't actually a known, controlled quantity in an abrupt switch-off · Never mentioning that something physical (parasitic capacitance, breakdown) must be what actually caps the voltage · Proposing only a series resistor with the coil as the fix, which doesn't address the turn-off transient at all · Suggesting a fix without explaining the clamping mechanism (e.g., naming a diode without saying it redirects the coil current)