Manufacturing, DFM & DFT — question 6 of 10
Write a real answer. It is graded against the question's rubric, and the mastery movement is computed by the same engine the product uses. Scoring here is deterministic rather than model-written, so this page costs nothing to run and nothing is saved. In a track built from your own posting, the same rubric is graded by the model, which is what produces feedback about your reasoning rather than about coverage.
A new board design starts production and the first-pass functional test yield is 82% across 500 units, with failures spread across five different failure modes, none dominant. A month later, after two firmware and one BOM revision, yield is still 82% but now 90% of failures are a single mode: a specific connector intermittently failing continuity test. Is this a design problem or a process problem, and what's your next investigative step?