Signal Integrity interview questions

10 questions, easiest first

1. 1You're handed a schematic with a digital signal that has a 200 picosecond rise time, driven through a trace that is 4 inches long on FR4 (propagation velocity roughly 6 inches per nanosecond). Someone on the team says 'it's a low speed signal, don't worry about it.' Is that a correct way to decide whether this trace needs to be treated as a transmission line? Walk me through how you'd actually make that call.intro

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   Clock frequency isn't the right thing to look at -- what matters is the edge rate, because a fast edge has high-frequency content regardless of how slowly the signal toggles. A 200ps rise time corresponds to a bandwidth around 0.35/200ps ≈ 1.75GHz, so this is effectively a multi-GHz signal from an SI standpoint. To decide if the trace is a transmission line, I compare its propagation delay to the rise time: 4 inches at ~167ps/inch is about 670ps one-way, over 3x the rise time. A common rule of thumb is that once trace delay exceeds roughly 1/6 of the rise time you should treat it as a transmission line -- we're way past that here. So I'd tell my teammate this trace absolutely needs controlled impedance and likely termination, and that 'low speed' based on clock rate is the wrong criterion.

   • Rejects 'clock speed = safe' reasoning — States explicitly that toggle rate is irrelevant and that rise/fall time is what sets bandwidth and reflection risk.
   • Applies a length-vs-rise-time threshold — Uses some form of the rule that transmission line effects matter when trace delay is a meaningful fraction (e.g., 1/6) of the rise time, not just 'long traces are bad.'
   • Does the numeric comparison — Estimates the trace's propagation delay (~0.6-0.7ns) and compares it to the 200ps rise time, concluding reflections must be managed.
   • States the practical consequence — Concludes with an action: this trace needs controlled impedance and/or termination, not just 'be careful.'

   Where answers go wrong: Equating clock frequency with signal bandwidth and dismissing the trace as 'low speed.' · Citing a rule of thumb without doing the arithmetic to check whether it applies here. · Never converting the qualitative rule into a decision (terminate or don't).

2. 2A colleague looks at a 2-inch trace and says, 'that's short, we don't need to worry about signal integrity here.' Under what conditions is that statement actually true, and under what conditions is it false? Walk through the reasoning you'd use, not just a rule-of-thumb length.intro

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   The statement is only true if the trace's delay is a small fraction of the signal's rise time. Using a typical FR4 velocity of about 6 in/ns, 2 inches is roughly 330-340 ps one-way, so round-trip is close to 700 ps. If the driver's rise time is, say, 3-5 ns, that round trip is well under a quarter of the rise time, so reflections settle out before the edge even finishes -- the trace behaves like a lumped capacitive load and SI isn't a real concern. But if the driver has a 200-300 ps rise time, like a lot of modern digital or high-speed serial outputs, that same 2-inch trace is now electrically long relative to the edge, and you'll get visible reflections and ringing. So the colleague's statement is really a statement about the driver's edge rate as much as the trace length -- I'd ask what's driving that trace before agreeing or disagreeing.

   • Reframes 'long' relative to rise time — States that whether a trace needs SI treatment depends on the ratio of propagation delay to signal rise time, not absolute physical length.
   • States a quantitative threshold — Gives a concrete rule such as round-trip delay less than ~1/4 to 1/6 of rise time being treated as lumped, or an equivalent threshold.
   • Uses propagation velocity to compute delay — Converts the 2-inch length into a delay using a reasonable FR4 propagation velocity (roughly 150-170 ps/inch) as part of the reasoning.
   • Connects to driver edge rate — Explicitly ties the conclusion to the driving edge rate -- a fast enough edge makes even a short trace electrically long.

   Where answers go wrong: Answering purely with a fixed length threshold (e.g., 'anything over 6 inches matters') with no mention of rise time. · Confusing propagation delay with signal frequency instead of edge rate. · Not distinguishing one-way delay from round-trip delay when checking against the rise time threshold.

3. 3You probe a 3.3V clock line with a standard 10x scope probe using its long ground clip lead, and you see nasty high-frequency ringing on every edge that isn't visible when you touch a nearby test point with a shorter ground path. What's going on, and how would you confirm which part of what you're seeing is real versus an artifact of your measurement?easy

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   That ringing is a classic sign of ground lead inductance. The probe tip, the trace, the long alligator-clip ground lead, and the probe body form a loop; the inductance of that loop resonates with the probe's input capacitance and rings on every fast edge, and it's an artifact of the measurement, not necessarily the circuit. To confirm, I'd swap to a spring-tip ground adapter or a ground ring right at the probe tip to shrink that loop drastically and re-measure the same node -- if the ringing amplitude and frequency drop a lot, it was mostly probe artifact. I wouldn't assume it's fully gone though; after minimizing the artifact I'd still check for real ringing caused by an actual impedance discontinuity on the board, but I'd trust that measurement a lot more than the one with the long ground lead.

   • Identifies the ground lead loop as the cause — Explains that the long ground clip adds series inductance that forms a resonant tank with the probe's tip capacitance.
   • Explains why the effect is measurement-dependent — States that changing the ground return path length changes the loop inductance and therefore the ringing, which is the tell that it's an artifact.
   • Proposes a concrete fix/confirmation — Suggests using a spring-tip ground adapter or ground ring right at the probe tip and re-measuring to see if ringing amplitude drops.
   • Doesn't dismiss the possibility of real ringing — Acknowledges that some ringing could be real (impedance discontinuity) and describes how to distinguish it after minimizing probe artifact.

   Where answers go wrong: Assuming all observed ringing must be a real signal integrity problem in the circuit and redesigning termination without checking the probe first. · Not knowing that ground lead length changes the measurement rather than just 'adding noise.' · Suggesting only 'use a better scope' instead of addressing the probing technique.

4. 4A 50 ohm trace drives into a receiver input that presents 150 ohms of impedance (no termination resistor placed). What is the reflection coefficient at that load, and what would you expect to see on a scope at the receiver as a result?easy

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   Reflection coefficient is Gamma = (ZL - Z0)/(ZL + Z0) = (150-50)/(150+50) = 100/200 = 0.5. That's a significant, positive mismatch, meaning half the incident wave's amplitude reflects back in phase with the original step. At the receiver I'd expect to see the initial edge, then a second step-up arriving one round-trip delay later, producing overshoot and possibly ringing if the source end isn't matched either and re-reflects that energy back down the line. A reflection coefficient of 0.5 is large enough that I'd want to add termination -- either a series resistor near the driver to match the line, or a parallel termination at the receiver -- rather than accept this waveform as-is.

   • Correct formula and arithmetic — States Gamma=(ZL-Z0)/(ZL+Z0) and computes (150-50)/(150+50)=0.5.
   • Correct sign interpretation — Notes the positive sign means the reflection adds in phase with the incident wave (high impedance mismatch, not a short).
   • Describes the waveform consequence — Explains this produces overshoot/step-up at the receiver, and if the source isn't matched, further ringing after the round trip.
   • Connects to termination need — States that a 0.5 reflection coefficient is significant and would normally warrant termination (series or parallel).

   Where answers go wrong: Flipping the formula and computing (Z0-ZL)/(Z0+ZL) sign incorrectly and misinterpreting the physical meaning. · Saying reflection coefficient of 0.5 is negligible when it actually represents a large mismatch. · Forgetting that the reflected wave takes another round trip to reach the source, so ringing timing matters.

5. 5You measure a rise time of 800 ps on a digital output using your scope and probe, and conclude you have comfortable margin against a 500 ps requirement. A teammate says the probe itself might be lying to you. What would make the measured rise time look slower than the signal actually is, and how would you check?easy

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   Two things could be going on. First, the scope-probe system has its own effective rise time from its bandwidth, roughly Tr equals 0.35 divided by bandwidth, and the measured rise time is approximately the root-sum-square of the real signal's rise time and the system's rise time. If I need to resolve 500 ps, I need something like 700 MHz of bandwidth in the whole probe-scope chain; if my setup is only rated for, say, 350-500 MHz, the reported 800 ps could largely be the instrument's own limitation, not the real signal. Second, and separately, the probe tip itself has capacitance that physically loads the driver and can genuinely slow down the real edge, which is a different failure mode from just misreporting. To check, I'd look up the probe and scope bandwidth specs and back-calculate the real signal's rise time, then try a higher-bandwidth, lower-capacitance probe or a different probe entirely and see if the rise time reading changes -- if it does, the first probe was influencing the measurement.

   • Identifies bandwidth limiting as a mechanism — Explains that the scope/probe system has its own rise time which combines with the true signal rise time (e.g., via root-sum-square), so a slow system reports an artificially slow edge.
   • Gives the bandwidth-rise time rule — States or approximates the relationship that required bandwidth is roughly 0.35/rise_time, and uses it to check whether the probe/scope spec is adequate for 500 ps.
   • Distinguishes loading from bandwidth limiting — Separately identifies that probe tip capacitance can physically load the driver and genuinely slow the real edge, not just misreport it.
   • Proposes a concrete check — Suggests an actual verification step, such as checking the probe/scope bandwidth spec against the required value, trying a higher-bandwidth or lower-capacitance probe, or comparing multiple probes.

   Where answers go wrong: Assuming the scope reading is always correct without questioning system bandwidth. · Treating bandwidth limiting and capacitive loading as the same phenomenon. · Not translating the 500 ps requirement into a required bandwidth number to sanity-check against instrument specs.

6. 6You need to terminate a fast digital signal that goes from one driver to one receiver on a point-to-point link. You're deciding between a series (source) termination resistor near the driver and a parallel termination resistor near the receiver. Walk me through the tradeoff and which you'd pick, and then tell me if your answer changes if this becomes a bus with three receivers tapped along the same trace.medium

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   For a single point-to-point link, series termination puts a resistor near the driver so driver output impedance plus the resistor equals Z0; the far end is left high-impedance (unterminated) so it reflects, but that reflection travels back and gets absorbed at the source, leaving a clean full-amplitude signal at the receiver after one round trip. It draws no static current, which is nice for power, but the signal is at half amplitude until that reflection returns, costing some timing margin. Parallel termination puts a resistor at the receiver matching Z0, so the wave is absorbed immediately at full amplitude with no waiting -- better for timing margin -- but it draws continuous DC current from the driver the whole time the line is driven high, which costs power and requires a driver that can source/sink that current. For a single point-to-point link I'd lean series termination if power matters and the extra round-trip delay is tolerable in the timing budget, otherwise parallel. Once you add multiple receivers tapped along the trace, series termination stops working well because only the very end of the line gets a clean full-amplitude signal quickly -- the taps in the middle see the half-amplitude incident wave before reflections settle. At that point I'd move to parallel or Thevenin termination at the far end, or reconsider the topology entirely (e.g., a proper multi-drop bus structure), because series termination is fundamentally a point-to-point solution.

   • Explains series termination's power/timing tradeoff — Notes series termination draws no static current but produces a half-amplitude waveform until the reflection returns, and requires an unterminated (high-Z) far end.
   • Explains parallel termination's power/timing tradeoff — Notes parallel termination absorbs the wave immediately at full amplitude but draws continuous current, costing power and requiring driver drive-strength headroom.
   • Makes a reasoned point-to-point choice — Picks one approach for the single point-to-point case and justifies it based on power budget or timing margin rather than asserting one is universally better.
   • Correctly reasons about the multi-drop change — Recognizes that series termination poorly serves multiple taps (only the end of the line gets full amplitude promptly) and that the topology likely needs rethinking (e.g., parallel termination at the far end, or a different bus topology) once there are multiple receivers.

   Where answers go wrong: Claiming one termination style is always superior without discussing the power vs. timing tradeoff. · Not noticing that series termination assumes a single high-impedance receiver at the far end and breaks down with multiple taps. · Ignoring the power cost of parallel termination on the driver's continuous current budget.

7. 7A high-speed signal trace on your board routes directly over a slot cut into the ground plane underneath it (the plane is split there for a different reason). The board passes bench functional tests but fails radiated emissions testing, and you also see extra ringing on that specific signal compared to others of the same length. How do you explain both symptoms, and what would you change?medium

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   At high frequency, return current doesn't just find the path of least DC resistance -- it flows directly underneath the signal trace on the return plane because that's the path of lowest loop inductance. When the trace crosses a slot in that plane, the return current can't go straight across; it has to detour around the slot, which does two things. First, it creates a much larger current loop, and loop area is directly proportional to radiated emissions, which explains the EMI test failure. Second, right where the trace crosses the slot, the trace loses its tight coupling to a return reference, so its local characteristic impedance changes -- that's a classic impedance discontinuity, and it explains the extra ringing on that specific trace. To fix it, I'd first try to reroute the trace so it never crosses the plane split at all. If that's not possible, I'd add a stitching capacitor across the slot right next to where the trace crosses, giving the high-frequency return current a short local path instead of a long detour.

   • Explains why return current follows the trace — States that high-frequency return current takes the path of lowest loop inductance, which is directly under the signal trace on the adjacent plane.
   • Connects the slot to the loop-area/EMI symptom — Explains that the slot forces the return current to detour, enlarging the current loop and increasing radiated emissions.
   • Connects the slot to the ringing symptom — Explains that crossing the slot changes the trace's characteristic impedance locally, creating a discontinuity that reflects and rings.
   • Proposes a concrete, specific fix — Suggests rerouting to avoid the split, or placing a stitching capacitor across the gap near the trace crossing if rerouting isn't possible.

   Where answers go wrong: Treating the EMI failure and the ringing as unrelated problems instead of recognizing a common root cause. · Suggesting a bulk decoupling cap fix instead of a stitching capacitor placed specifically at the slot crossing. · Assuming ground plane splits only matter for DC/low-frequency isolation and don't affect fast signals.

8. 8You have a single driver feeding three receivers that tap off a shared trace at different points along its length -- a multi-drop bus, not a point-to-point link. The team is debating whether to put one termination resistor at the far end, use Thevenin termination, or add small series resistors at each stub. Walk me through how you'd reason about this and what you'd actually recommend.medium

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   Multi-drop is harder than point-to-point because termination at the far end only fixes the reflection off the true end of the trace -- it does nothing about the discontinuities created at each stub where a receiver taps in. Each of those taps looks like a small impedance bump and can cause local ringing if the stub is electrically long relative to the driving edge. So my approach would be: first, keep each stub physically short enough that its round-trip delay is a small fraction of the rise time, so it behaves as a lumped capacitive load rather than its own transmission line. If that's not achievable, add a small series resistor at each stub to isolate the stub capacitance and damp the local reflection. Then still terminate the true end of the main bus with a parallel or Thevenin resistor to kill the end-of-line reflection. The tradeoff is that parallel and Thevenin termination draw continuous DC current, and with three loads that current budget starts to matter for power and for the drive strength needed. If the bus needs to run fast or has many loads, I'd seriously consider whether a multi-drop topology is even the right call versus point-to-point or star connections through a buffer, since multi-drop SI gets messy quickly as speed increases.

   • Identifies stub-induced reflections separately from end-of-line reflections — Explains that each receiver tap is its own local impedance discontinuity and that far-end termination alone won't eliminate ringing caused by the stubs themselves.
   • Proposes keeping stubs short or isolating them — Recommends keeping stub length short relative to the rise-time-equivalent length, and/or adding small series resistors at each tap to isolate stub capacitance and damp local reflections.
   • Recommends far-end termination for the main line — States that the true end of the bus should still get a parallel or Thevenin termination to prevent reflection off the actual end of the trace.
   • Weighs DC power cost against alternatives — Explicitly discusses that parallel/Thevenin termination draws continuous DC current (a real cost with more loads), while series-only termination avoids that but complicates a true multi-drop topology, and considers whether a point-to-point or star/fan-out topology might be preferable.

   Where answers go wrong: Treating this exactly like a point-to-point link and only debating series vs. parallel at the single receiver without addressing the stubs. · Ignoring that far-end termination doesn't fix reflections generated at each tap point. · Not mentioning the DC current/power cost tradeoff of parallel or Thevenin termination on a bus with multiple loads.

9. 9You have two parallel traces running side by side for several inches: an aggressor carrying a fast clock, and a victim carrying a data signal that occasionally gets corrupted. On the scope, you see two different kinds of unwanted bumps: a narrow pulse on the victim near the driver end that appears right at the aggressor's edge, and a wider, bipolar-looking pulse on the victim near the far/receiver end. Explain what's causing each of these, why they look different, and how you'd reduce the coupling.hard

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   The narrow pulse at the driver end is near-end crosstalk, and the bipolar pulse at the receiver end is far-end crosstalk -- they're two manifestations of the same mutual capacitance and mutual inductance between the coupled traces, but they behave differently because of where and how they combine. NEXT travels backward toward the aggressor's own driver end and its magnitude grows with the length of the parallel run until it saturates once that length corresponds to the aggressor's rise time; it looks like a saturating bump synchronized to the aggressor edge. FEXT travels forward in the same direction as the aggressor's signal, arriving near the victim's receiver, and it's proportional to the derivative of the aggressor's edge -- for typical coupled traces where inductive and capacitive coupling don't perfectly cancel, this shows up as a sharp bipolar pulse, and it gets worse with faster edges and longer coupled length. To reduce both, I'd first try increasing the spacing between the traces since coupling falls off quickly with distance, and shorten the length over which they run parallel if possible. If neither is enough, I'd add a grounded guard trace with stitching vias between the aggressor and victim, and make sure there's a solid, unbroken return plane directly beneath both traces, since a broken or distant reference plane makes both NEXT and FEXT worse.

   • Correctly identifies NEXT vs FEXT by location and shape — Attributes the narrow pulse near the driver end to near-end crosstalk and the bipolar pulse near the receiver end to far-end crosstalk, matching each by its physical location and waveform shape.
   • Explains why FEXT is derivative/bipolar shaped — Notes FEXT is proportional to the rate of change of the aggressor's edge and depends on the relative magnitude of mutual inductive vs capacitive coupling, producing a bipolar pulse for typical coupled microstrip/stripline.
   • Explains why NEXT saturates and depends on coupled length — Notes NEXT grows with coupled length up to a saturation point tied to the signal's rise time, and travels back toward the aggressor's driver.
   • Ties both to a common physical coupling mechanism — States both arise from mutual capacitance and inductance between the two traces over the parallel run, not two unrelated phenomena.
   • Proposes concrete, prioritized mitigations — Suggests at least two of: increasing spacing, shortening parallel run length, adding a guard trace/via-stitched ground, ensuring a continuous return plane, or moving one trace to another layer.

   Where answers go wrong: Assuming both bumps are the same phenomenon just measured at different points, without distinguishing NEXT and FEXT. · Attributing crosstalk purely to capacitive coupling and ignoring mutual inductance, which is what makes FEXT bipolar. · Jumping straight to 'add a ground plane' without addressing spacing or coupled length, or without checking the existing plane is actually continuous under both traces.

10. 10A serial link works cleanly when you run a continuous alternating bit pattern (0101...) through it, but throws bit errors specifically when the data contains a long run of identical bits followed by a transition -- for example, ...0000001... The trace has a single series termination resistor at the driver, correctly sized for the line's characteristic impedance, and an eye diagram averaged over many random patterns looks fine with healthy margin. What's actually going on, and how would you isolate it?hard

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    Since errors correlate with specific bit-run lengths rather than occurring on every edge, this isn't a constant impedance mismatch -- it's a pattern-dependent effect, most likely inter-symbol interference or baseline wander. Series termination only matches the driver side; the receiver end is still unterminated, so the incident edge reflects fully at the receiver and travels back toward the driver. If the driver's source impedance isn't a perfect match, or there's a connector or stub along the path, some of that reflected energy isn't fully absorbed and lingers on the line, and its effect on the next transition depends on how much energy accumulated during the preceding run -- which is exactly why long runs followed by a transition behave differently than an alternating pattern where reflections have a chance to settle every cycle. Separately, if there's AC coupling anywhere in the path, a long run of identical bits will droop the DC baseline toward the common-mode level, so the next transition starts from an already-shifted level, effectively closing the eye at that specific point -- classic baseline wander from insufficient transition density. The averaged eye diagram looks fine because those problematic transitions are a small fraction of all the bits captured and get washed out in the average. To isolate it, I'd capture a pattern-triggered or gated eye diagram specifically after N consecutive identical bits and compare it against the eye after an alternating pattern, check whether there's AC coupling in the signal path and estimate its droop time constant against the run length, and run a TDR on the driver to confirm the actual source impedance rather than assuming the datasheet value is exact.

    • Rules out static mismatch as the cause — Explicitly reasons that a fixed impedance mismatch would show up on every transition, so the pattern-dependence points to something history-dependent rather than a constant reflection.
    • Identifies a specific pattern-dependent mechanism — Proposes a concrete cause such as unabsorbed reflections off the unterminated receiver end interacting with subsequent transitions, or AC-coupling baseline wander/droop from long identical runs.
    • Explains why series termination alone doesn't fully solve this — Notes that series termination only matches the driver side; the receiver end is still a discontinuity, and any imperfect source match or extra stub/connector leaves residual reflected energy that can accumulate with bit history.
    • Explains the limitation of the averaged eye diagram — States that averaging across many random patterns can hide a worst-case effect that only appears after specific run lengths, since those bits are a small fraction of the total.
    • Proposes a concrete isolation method — Suggests a specific test such as triggering/gating the eye diagram on specific bit sequences, comparing eye height/timing across different run lengths, checking for AC-coupling cap sizing, or running a TDR to verify the actual driver output impedance.

    Where answers go wrong: Attributing the errors to a general impedance mismatch without explaining why that wouldn't show up on the alternating pattern. · Not distinguishing reflection-based ISI from AC-coupling baseline wander as two different candidate mechanisms. · Trusting the averaged eye diagram as proof the link is healthy without questioning what averaging can hide. · Proposing to just add more termination without a plan to confirm the actual root cause first.